OTHER-1 Instruction Set Details

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Memory Reference and I/O Instructions.

The memory reference instructions have a 10 bit address field and 2 control bits that determine the addressing mode: absolute in the current 1024 word page or relative to the current location, a direct address or and indirect reference or memory increment (for ISV, ISA instructions). An indirectly referenced location has a similar address format that can continue or terminate the indirect referencing.

Stand-alone address words indirectly referenced by an instruction also have two control bits to specify possible further indirection and absolute or relative type: relative is again a 10 bit field, but absolute is a 12 bit field allowing addressing of the full 4K words of implemented core memory. See Memory Reference Instructions and Addressing Mode Descriptions page for further detail.


The I/O instruction works with the A accumulator and a 16 bit parallel data I/O bus. A accumulator data is available to the I/O device during the first part of the I/O time, and device data can be loaded into the A accumulator during a later part of the I/O time. 16 devices can be addressed, and controlled with a 3-bit function code - typically set/clear states, test and skip if done, etc.

Operate Instructions.
The Combine instruction performs logical or arithmetic operations with data from the A, B, and Link registers and deposits the results in Link and none, one or both A and B, depending on instruction flags. This instruction allows use of the full set of combinational possibilities of the 74181 Arithmetic logic Unit (ALU) integrated circuit (4 of which are ganged together to deal with the 16 bit word size of OTHER-1).
The Shift instruction shifts or rotates A or B register content left or right, and may or may not include the Link in the operation. Results go to none, A, B, or both, and possibly the Link.
The Test instruction checks the combination of conditions selected (arithmetic result positive, zero, overflow; link set; interrupts enabled) and skips the next instruction based on the action selected in the instruction.

The Miscellaneous instruction implements loading the control panel toggle switch settings (the Switch Register) into the A register, enable/disable interrupts, and the Halt operation. (Actual I/O interrupt functionality was never implemented in the OTHER-1.)

Coding.
Since the instruction set is unique, there is no off-shelf software available for the OTHER-1. I defined a simple assembly language to aid in writing programs, but I manually converted the assembly code to machine code in octal format, and entered the code through the front panel switches or by using the console keyboard and TV Typewriter, using a simple utility program. I prepared some tables of commonly used combine, shift, and I/O instruction forms to aid the conversion to machine code. Once the code was entered, the ferrite core memory retained the program while the computer was shut down. Other program utilities could read/write programs from/to paper tape; if memory became corrupted or was cleared, the tape read utility could be entered via switches, and used to load larger programs from paper tape. These utilities were written with relative address mode, and so were location independent - they could be loaded  anywhere convenient without needing to recode memory references.
Coding example:
This routine punches 64 consecutive words from a start address set in the switch register to the teletype paper tape punch as four 4-bit nibbles (each with even parity) per word.
The largest program I coded for the OTHER-1 was 3-D tic-tac-toe, played in a 4x4x4 cube. The core :-) of the program accepts 3-coordinate moves by the human and replies with 3-coordinate machine moves - I had decoded it from a memory dump of an IBM 1620 program, but don't know who wrote the original program. I ported this to the OTHER-1, and added code to accept human moves from the console keyboard, and write the human and machine moves to a game board displayed on the TV-Typewriter. It required about 750 lines of assembly and generated about the same number of code words.